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1. Contador de 8 bits (Ver Inglés)

The purpose of this project is to implement an 8-bit counter using Symbhia in VHDL language. The counter is controlled by 1 start/stop bit and a reset bit. The count increment is 100ms (Time that can be changed by modifying the DELAY_FIN constant).


Ports used in this project:

  • CLK (Input – 1 bit): Clock at 50MHz.
  • INI (Input – 1 bit): Start bit connected to a switch on Symbhia. When INI is set to ‘1’ the counter starts, when it is set to ‘0’ it stops counting.
  • RESET (Input – 1 bit): Reset bit connected to a switch on Symbhia.  When RESET is ‘1’, the counter is reseting.
  • LED (Output – 8 bits): 8 bit output connected to the 8 LEDs of Symbhia.